High-performance computing veteran Thomas Sterling has the respect of his peers and the industry. His excellent speaking skills, candor and humor complement his HPC expertise and public persona. He is also admired by young researchers and students – they seek him out at scientific computing conferences for advice on research projects and career choices. This year, at ISC’13, Sterling will be delivering a keynote on HPC Achievement and Impact - 2013, thus marking a decade as an ISC keynote speaker. Here, he is speaking to ISC’s PR manager, Nages Sieslack…
Please tell us what drew you to the field of high-performance computing?
It was an incremental process. When I first matriculated at MIT as a graduate student (1977) the Cray-1 was still the fastest computer in the world and microprocessors were 8 bit architectures with early 16 bit chips (e.g., Intel 8086) coming down the pike. In my second year, I was challenged by my faculty advisor to pursue the question of applying these new emerging technologies to the simulation of power electronic circuits like switching regulators; an area that still made heavy use of analog computers (bunches of op amps solving first-order differential equations). I built a machine of 8 worker processors and a master in an S100 bus based chassis and ran it in lightweight SPMD mode. It never worked well but it exposed me firsthand to many salient issues associated with incipient multiprocessors. My Ph.D was on the deeper question of parallel paradigms and execution models before it was clear what that even meant. We built a shared memory machine at MIT called Concert (led by Bert Halstead) and dealt with many of the communication issues along with programming and synchronization questions. Slowly — very slowly — I started to build up some insight into the foundational challenges and models that dictated parallel computing. I’ve been pursuing it every since. More than 30 years later, I think I’ve almost got it; any day now.
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